Reduced circuit trace roughness for improved signal performance

ABSTRACT

Exemplary techniques for improving the performance of signals transmitted by conductive circuit traces are disclosed. The techniques may be realized as a method comprising the step of reducing a surface roughness of at least one surface of a conductive circuit trace. Alternatively, the techniques may be realized as a circuit board for transmitting at least one signal, the circuit board comprising at least one conductive circuit trace for carrying at least one signal, the at least one conductive circuit trace having at least one polished surface. Further, the technique may be realized as a conductive circuit trace for carrying a signal, the conductive circuit trace comprising conductive material having a plurality of surfaces substantially parallel with a direction of propagation of the signal, wherein the plurality of surfaces includes at least one polished surface having a reduced surface roughness.

CROSS-REFERENCE TO RELATED APPLICATIONS

This patent application is a continuation of U.S. patent applicationSer. No. 10/667,491 filed Sep. 23, 2003, now U.S. Pat. No. 8,123,927,issued Feb. 28, 2012 which is hereby incorporated by reference herein inits entirety.

FIELD OF THE INVENTION

The present invention relates generally to signal transmission viacircuit traces in single-layer or multilayer circuit boards and, moreparticularly, to a technique for reducing the surface roughness of acircuit trace to improve the performance of a signal transmittedtherein.

BACKGROUND OF THE INVENTION

Conductors transmitting signals often exhibit a phenomenon known as“skin effect” whereby the self-inductance of the conductors forceselectrons toward the surface of the conductors. Skin effect isparticularly prevalent in conductors transmitting high-frequencysignals. For example, it has been found that for a copper conductor, thedepth from the surface at which the majority of the electrons flow(i.e., the “skin depth”) is approximately 2 microns for a 1 gigahertz(GHz) signal, 0.66 microns for a 10 GHz signal, and 0.33 microns for a40 GHz signal.

Skin effect restricts current to only a relatively small portion of thetotal cross-sectional area of a conductor. Conductors, however,frequently exhibit a surface roughness that may extend into the skindepth of the conductors. As a result of this surface roughness, the meanfree path traveled by electrons exhibiting skin effect increases inlength as the electrons travel up and down the contours of the roughsurface of the conductor. This increase in the effective signal pathresults in a corresponding increase in the resistance to the flow of thecurrent and transmission time and, consequently, a decrease in thesignal reach and performance.

In view of the foregoing, it would be desirable to provide a techniquefor conditioning conductive circuit traces exhibiting the skin effectphenomenon that overcomes the above-described inadequacies andshortcomings in an efficient and cost effective manner.

SUMMARY OF THE INVENTION

According to the present invention, a technique for improving signalperformance in conductive circuit traces is provided. The technique maybe realized by the use of chemical polishing, electropolishing, or otherpolishing technique to achieve a polished finish by reducing bothlateral and transverse fabrication roughness. Surface polishing, alongwith the use of low profile adhesion promoters substantially improveshigh speed signal propagation for metal on dielectric circuit boards.

In one embodiment, the technique may be realized as a method forimproving performance of a signal transmitted via a conductive circuittrace of a circuit board. The method comprises the step of reducing asurface roughness of at least one surface of the conductive circuittrace.

In another embodiment, the technique may be realized as a circuit boardfor transmitting at least one signal, the circuit board comprising atleast one conductive circuit trace for carrying at least one signal, theat least one conductive circuit trace having at least one polishedsurface.

In yet another embodiment, the technique may be realized as a conductivecircuit trace for carrying a signal. The conductive circuit tracecomprises conductive material having a plurality of surfacessubstantially parallel with a direction of propagation of the signal,wherein the plurality of surfaces includes at least one polished surfacehaving a reduced surface roughness.

The at least one surface of the conductive circuit trace may include asurface parallel and distal to a surface of the circuit board, a surfaceparallel and proximal to the surface of the circuit board or a surfaceperpendicular to the surface of the circuit board. The at least onepolished surface may be polished using electropolishing, chemicalpolishing, electroplating or vacuum deposition. The surface roughness ofthe at least one surface preferably is reduced to no more than 20microinches RMS, more preferably is reduced to no more than 10microinches RMS, and most preferably reduced to no more than 5microinches root-mean-squared RMS.

The present invention will now be described in more detail withreference to exemplary embodiments thereof as shown in the appendeddrawings. While the present invention is described below with referenceto preferred embodiments, it should be understood that the presentinvention is not limited thereto. Those of ordinary skill in the arthaving access to the teachings herein will recognize additionalimplementations, modifications, and embodiments, as well as other fieldsof use, which are within the scope of the present invention as disclosedand claimed herein, and with respect to which the present inventioncould be of significant utility.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to facilitate a fuller understanding of the present invention,reference is now made to the appended drawings. These drawings shouldnot be construed as limiting the present invention, but are intended tobe exemplary only.

FIG. 1A is a cross-section view illustrating an exemplary printedcircuit board (PCB) having an unpolished circuit trace in accordancewith at least one embodiment of the present invention.

FIG. 1B is a cross-section view illustrating an exemplary PCB having apolished conductive circuit trace in accordance with at least oneembodiment of the present invention.

FIG. 2 is a cross-section view and plan view illustrating an exemplaryPCB having a plurality of conductive circuit traces with surfacescapable of being polished in accordance with at least one embodiment ofthe present invention.

FIG. 3 is a plan view illustrating an exemplary technique for polishingone or more conductive circuit traces of a multilayer circuit board inaccordance with at least one embodiment of the present invention.

DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENT(S)

The following description is intended to convey a thorough understandingof the present invention by providing a number of specific embodimentsand details involving polishing conductive circuit traces in circuitboards and other circuit devices. It is understood, however, that thepresent invention is not limited to these specific embodiments anddetails, which are exemplary only. It is further understood that onepossessing ordinary skill in the art, in light of known systems andmethods, would appreciate the use of the invention for its intendedpurposes and benefits in any number of alternative embodiments,depending upon specific design and other needs.

FIGS. 1A-3 illustrate various exemplary techniques for polishing circuittraces of a printed circuit board (PCB) to improve the performance ofsignals transmitted therein. In at least one embodiment, one or moresurfaces of one or more conductive circuit traces of a PCB may bepolished to reduce their surface roughness. Consequently, the mean freepath traveled by electrons at skin depth of the conductor may be reducedcompared to an unpolished circuit trace. This reduction in the distancetraveled by electrons through the circuit trace typically results in areduction of resistance to the current caused by the conductive circuittrace and, therefore, increases in the signal reach and signalperformance.

The term surface roughness generally refers to the frequency and/ormagnitude of projections and depressions at a surface of a material thatcause the surface to deviate from a level line representing absolutesmoothness. A variety of techniques may be used to measure surfaceroughness, including surface profilometry by stylus trace or AtomicForce Microscopy resulting in the root-mean-squared (RMS) or thecenterline average (CLA) roughness value. The term polish refers to anyof a variety of techniques used to reduce the surface roughness ofmetals and other conductors, including but not limited to,electropolishing, chemical polishing, electrochemical polishing,chemical-mechanical polishing, mechanical polishing, electroplating, andvacuum deposition. The term high frequency generally refers to afrequency range where the amplitude of the surface roughness equals orexceeds the skin depth in the conductor. Although the present inventionis not limited to any particular frequency range, typical frequencyranges that result in significant signal deterioration due to the skineffect include frequencies from 1 Megahertz (MHz) to hundreds ofGigahertz (GHz), depending at least in part on the properties of theconductor.

Referring now to FIGS. 1A and 1B, an exemplary technique for improvingsignal performance by using polished circuit traces is illustrated inaccordance with at least one embodiment of the present invention. FIG.1A illustrates a cross-section view of an exemplary circuit module 100Aincluding a PCB 102A having vias 104, 106 electrically connected tointegrated circuits (ICs) 108, 110, respectively. In the illustratedexample, the PCB 102A further includes an unpolished conductive circuittrace 112A formed on a top surface of the PCB 102A and electricallyconnecting the vias 104, 106 for the purpose of transmitting a signal114. While the signal 114 may include a signal having a wide range offrequencies in accordance with at least one embodiment of the presentinvention, the signal 114 preferably includes a high-frequency signal.The circuit trace 112A may include any of a variety of circuit tracematerials used in circuit devices, including, for example, wroughtfoils, electroplated foils or deposited conductive material and mayinclude any of a variety of conductive substances, such as copper,aluminum, gold, nickel, silver and the like.

In the illustrated example, the signal 114 has a frequency such that thecircuit trace 112A exhibits the skin effect at the surfacessubstantially parallel to the propagation direction of the signal 114.Further, it is assumed that the surface roughness of the unpolishedcircuit trace 112A extends into the skin depth of the transmittedcurrent of the signal 114 and therefore increases the mean free path ofthe electrons of the transmitted current that travel at or near thesurface of the circuit trace 112A.

View 120A depicts an enlarged cross-section of the circuit trace 112A.As illustrated, the top surface 122A and bottom surface 124A of thecircuit trace 112A exhibit significant roughness (e.g., 20-150microinches RMS). The side surfaces (not illustrated) of the circuittrace 112A exhibit a similar surface roughness in this example. Due tothe relative roughness of the respective surfaces, electrons travelingat or near the top surface 122A travel substantially along electron path132A and electrons traveling at or near the bottom surface travelsubstantially along electron path 134A.

It will be appreciated that the electron paths 132A, 134A aresubstantially non-linear because they follow the contours of theirrespective rough surfaces 122A, 124A. As a result, the length of theelectron paths 132A, 134A are substantially longer than thesubstantially linear path of an electron traveling at or near the centerof the circuit trace 112A. This additional distance traveled byelectrons at skin depth typically results in increased resistance anddecreased signal reach and signal performance.

Referring now to FIG. 1B, a cross-section view of an exemplary circuitmodule 100B including a PCB 102B having the vias 104, 106 electricallyconnected to the ICs 108, 110, respectively, as with the PCB 102A ofFIG. 1A. Unlike the PCB 102A, however, the PCB 102B includes a polishedconductive circuit trace 112B formed on a top surface of the PCB 102Band electrically connecting the vias 104, 106 for the purpose oftransmitting the signal 114. The circuit trace 112B may include any of avariety of circuit trace materials used in circuit devices as discussedabove.

In at least one embodiment, one or more surfaces of the circuit trace112B are polished to reduce their surface roughness. Any of a variety oftechniques may be used to polish the one or more surfaces of the circuittrace 112B, including electropolishing, chemical polishing,electroplating, vacuum deposition and the like. Techniques for polishingthe surfaces of a circuit trace are discussed in greater detail below.In one embodiment, the surface(s) of the circuit trace 112B are polishedto have a roughness preferably of approximately 20 microinches or less,more preferably of approximately 10 microinches or less, and mostpreferably of approximately 5 microinches or less.

View 120B illustrates an enlarged cross-section view of the polishedcircuit trace 112B. As depicted, the polished top surface 122B and thepolished bottom surface 124B exhibit a significantly reduced surfaceroughness compared to the surfaces 122A, 124A of the unpolished circuittrace 112A (FIG. 1A). Consequently, the electron paths 132B, 134Btraveled by electrons at skin depth along the top surface 122B, 124B,respectively, are significantly shorter compared to the correspondingelectron paths 132A, 134A of the unpolished circuit trace 112A. Thereduction in the mean free path traveled by the electrons typicallyresults in the reduction of resistance to the current of the signal 114and, therefore, an increase in the signal reach and a decrease in signaldistortion.

It will be appreciated that the improvement in the transmitted signalgenerally is based at least in part on whether the mean free path islateral (i.e., along the conductor) or traverse (i.e., across theconductor). Generally, traverse smoothing provides a more significantimprovement in the signal transmission than that provided by lateralsmoothing. For example, in certain instances it has been found thatsignal improvements for lateral smoothing can result up to 20%improvement while signal improvements resulting from transversepolishing can improve 50% or more.

Referring now to FIG. 2, an exemplary multilayer PCB 204 having avariety of conductive circuit traces capable of being polished isillustrated in accordance with at least one embodiment of the presentinvention. In the illustrated example, the PCB 204 includes a pluralityof circuit traces 212-218 at a variety of locations within the PCB 204.The circuit traces 212 and 218 are located on the top and bottomsurface, respectively, of the PCB 204. The circuit traces 214 and 216are located at interior layers of the PCB 204. The circuit traces may beconnected to other features of the PCB 204. For example, the circuittrace 218 may be electrically connected to a via 206 at the bottomsurface and the circuit trace 214 may be electrically connected to thevia 206 and to the circuit trace 212 by way of a microvia 220.

A circuit trace generally is formed with a roughly rectangularcross-section with approximately four surfaces running substantiallyparallel to the propagation direction of the transmitted signal. Toillustrate, view 200B depicts a plan view of a portion of the circuittrace 212. Surface 222A (i.e., the “top surface”) includes the surfaceof the circuit trace 212 substantially parallel to the surface of thePCB 204 and distal to the center 208 of the PCB 204. Surface 222B (i.e.,the “bottom surface”) includes the surface of the circuit trace 212substantially parallel to the surface of the PCB and proximate to thecenter 208 of the PCB 204. Surfaces 222C and 222D (i.e., the “sidesurfaces”) include the surfaces of the circuit trace 212 that aresubstantially perpendicular to the surface of the PCB 204 and parallelto the direction of signal propagation. Circuit traces 214-228 havesimilarly arranged surfaces 224A-224C, 226A-226D and 228A-228C,respectively.

In accordance with at least one embodiment of the present invention, anyor all of the surfaces of a circuit trace may be polished to improvesignal performance. For example, the top surface 222A and side surfaces222C, 222D may be polished after the circuit trace 212 is affixed to thesurface of the PCB 204, while the bottom surface 222B remains unpolishedto strengthen adhesion between the surface of the PCB 204 and thecircuit trace 212. Alternately, the bottom surface 222B could bepolished during manufacture of the material used to make the circuittrace 212 and then adhesion promoters may be used to strengthen theadhesion between the bottom surface 222B and the surface of the PCB 204.

It typically is difficult or impossible to polish the surfaces of acircuit trace embedded in an interior layer of the PCB after the circuittrace is laminated into the PCB. Accordingly, in at least one embodimentinterior circuit traces may be polished prior to their lamination, asdiscussed in greater detail below.

Referring now to FIG. 3, exemplary techniques for polishing circuittraces and constructing a multilayer circuit board having polishedcircuit traces are illustrated in accordance with at least oneembodiment of the present invention.

Multilayer circuit boards generally are constructed using a laminationapproach whereby the circuit traces for a given layer are formed orfixed upon a substrate layer. To illustrate, a laminate 300A may beformed as a plurality of unpolished circuit traces 304A formed on orfixed to a surface of a substrate 302. View 306 illustrates an enlargedsection of the laminate 300A whereby a circuit trace portion 308 isaffixed to the surface of the laminate 302 at adhesion area 310 of thelaminate portion 306A to generate laminate portion 306B.

The combined circuit traces/substrate layer then may be then laminatedto another layer of the PCB. This lamination process typically isrepeated for each layer to form the multilayer PCB. Because it isdifficult if not impossible to polish circuit traces after thelamination process (other than circuit traces on the surfaces of thePCB), the polishing of the circuit traces may occur prior to laminationin accordance with at least one embodiment.

In one embodiment, the bottom surfaces of the circuit traces (i.e., thesurface to contact the laminate) may be polished prior to mounting.Because normal adhesion techniques may not adequately bond to thepolished bottom surface, adhesion promoters, such as very low profileadhesion promoters, may be applied to the polished bottom surfaces ofthe circuit traces and/or to the corresponding positions on the surfaceof the laminate. In certain instances, however, the bond strengthoffered by an unpolished bottom surface may outweigh the signalperformance improvement offered by a polished bottom surface.Accordingly, one or more of the top and side surfaces may be polishedwhile the bottom surface receives little or no finishing prior toattachment to the laminate.

After affixing the unpolished circuit traces 304A to the substrate 302,one or more metal polishing techniques may be applied to the laminate300A to polish any or all of the top and side surfaces of the circuittraces 304A. Any of a variety of metal polishing techniques may beimplemented, including, for example, electropolishing, chemicalpolishing, chemical mechanical polishing, mechanical polishing,electroplating, vacuum deposition, and the like.

Electropolishing generally entails submersing the laminate 300A in anelectrolyte 312 (contained by a tub 310) and subject the circuit traces304A to an electrical current. The resulting electrochemical reactionsremove metal ion-by-ion from the exposed surfaces of the circuit traces.The rate of metal removal is greatest at projections on the surface ofthe circuit traces and lowest at depressions on the surface of thecircuit traces. As a result of this disparate rate of metal removal,projections, or “peaks” on the surface are removed much more quicklythan depressions, resulting in a substantially uniform surface. Chemicalpolishing works in a similar manner whereby the laminate 300A may besubmersed in an acidic or alkaline solution that etches the surfaces ofthe circuit traces 304A to smooth projections on the surfaces.

In contrast to electropolishing or chemical polishing, electroplatingand vacuum deposition polish the surface of a conductor by coating thesurface with a layer of conductive material, where the resulting coatedlayer typically fills in depressions at a greater rate than it coversprojections. The resulting coated surface typically is substantiallyuniform. Other metal finishing techniques for providing smoothersurfaces in conductive materials may be used without departing from thespirit or the scope of the present invention.

As a result of the application of one or more metal finishingtechniques, the laminate 300A having unpolished (or partially polished)circuit traces 304A may be converted to a laminate 300B having polishedcircuit traces 304B. The laminate 300B then may be laminated to anunderlying laminate 306 to form part or all of a multilayer circuitboard.

The present invention is not to be limited in scope by the specificembodiments described herein. Indeed, various modifications of thepresent invention, in addition to those described herein, will beapparent to those of ordinary skill in the art from the foregoingdescription and accompanying drawings. Thus, such modifications areintended to fall within the scope of the following appended claims.Further, although the present invention has been described herein in thecontext of a particular implementation in a particular environment for aparticular purpose, those of ordinary skill in the art will recognizethat its usefulness is not limited thereto and that the presentinvention can be beneficially implemented in any number of environmentsfor any number of purposes. Accordingly, the claims set forth belowshould be construed in view of the full breath and spirit of the presentinvention as disclosed herein.

1-18. (canceled)
 19. A method of manufacturing a circuit board,comprising: providing a first circuit board layer of a circuit board,the first circuit board layer having a conductive circuit trace on asurface of the first circuit board layer; reducing a surface roughnessof at least one surface of the conductive circuit trace by vacuumdepositing conductive material on the at least one surface; andlaminating the first circuit board layer with a second circuit boardlayer.
 20. The method of claim 19, wherein the step of reducing thesurface roughness comprises a lateral smoothing technique operable toreduce surface roughness in a direction along the circuit trace.
 21. Themethod of claim 19, wherein the step of reducing the surface roughnesscomprises a transverse smoothing technique operable to reduce surfaceroughness in a direction across the circuit trace.
 22. The method ofclaim 19, wherein the step of reducing the surface roughness reduces thesurface roughness to no more than 20 microinches root-mean-squared(RMS).
 23. The method of claim 19, wherein the step of reducing thesurface roughness reduces the surface roughness to no more than 10microinches root-mean-squared (RMS).
 24. The method of claim 19, whereinthe step of reducing the surface roughness reduces the surface roughnessto no more than 5 microinches root-mean-squared (RMS).
 25. The method ofclaim 19, further comprising forming the circuit trace on the surface ofthe first circuit board layer.
 26. The method of claim 19, furthercomprising affixing the circuit trace on the surface of the firstcircuit board layer.
 27. The method of claim 26, further comprisingreducing a surface roughness of a surface of the circuit trace beforeaffixing that surface of the circuit trace to the surface of the firstcircuit board layer.
 28. The method of claim 27, further comprisingapplying an adhesion promoter to strengthen adhesion between the surfaceof the circuit trace and the surface of the first circuit board layer.29. The method of claim 19, comprising reducing a roughness of at leastone side surface of the circuit board trace.
 30. A circuit boardmanufactured by: providing a first circuit board layer of a circuitboard, the first circuit board layer having a conductive circuit traceon a surface of the first circuit board layer; reducing a surfaceroughness of at least one surface of the conductive circuit trace byvacuum depositing conductive material on the at least one surface; andlaminating the first circuit board layer with a second circuit boardlayer.
 31. The circuit board of claim 30, wherein the surface roughnessof the circuit trace is no more than 20 microinches root-mean-squared(RMS).
 32. The circuit board of claim 30, wherein the surface roughnessof the circuit trace is no more than 10 microinches root-mean-squared(RMS).
 33. The circuit board of claim 30, wherein the surface roughnessof the circuit trace is no more than 5 microinches root-mean-squared(RMS).
 34. A method of manufacturing a circuit board, comprising:providing a first circuit board layer of a circuit board, the firstcircuit board layer having a conductive circuit trace on a surface ofthe first circuit board layer; reducing a surface roughness of at leastone surface of the conductive circuit trace; applying an adhesionpromoter to the at least one surface of the conductive circuit trace;and laminating the first circuit board layer with a second circuit boardlayer.
 35. The method of claim 34, further comprising affixing thecircuit trace on the surface of the first circuit board layer.
 36. Themethod of claim 35, further comprising reducing a surface roughness of asurface of the circuit trace before affixing that surface of the circuittrace to the surface of the first circuit board layer.
 37. The method ofclaim 36, further comprising applying an adhesion promoter to strengthenadhesion between the surface of the circuit trace and the surface of thefirst circuit board layer.
 38. The method of claim 34, wherein reducingsurface roughness comprises at least one method in a group consisting ofelectropolishing the at least one surface, chemical polishing the atleast one surface, electroplating the at least one surface; and vacuumdepositing conductive material on the at least one surface.